Particular embodiments generally relate to asymmetric correction circuits.
Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
In a read channel for a hard disk drive, a signal received from a read head of the disk drive may be asymmetric. For better performance, the symmetry of the asymmetric signal should be corrected.
FIG. 1a depicts a graph 100 of an asymmetric signal 102 and ideal signal 104. Ideal signal 104 includes pulses in a period that have absolute peak amplitudes that are equal and asymmetric signal 102 has pulses that have unequal absolute peak amplitudes in the period. The correction of asymmetric signal 102 is performed to correct the asymmetry of asymmetric signal to be similar to the symmetry of ideal signal 104.
One way of correcting asymmetric signal 102 is to generate a square term that increases or decreases the amplitude of asymmetric signal 102. FIG. 1b depicts a graph showing the correction. A square term 106 is combined with asymmetric signal 102 to produce an output signal 108. However, an additional path and extra circuitry are needed to generate the square term.
Another way of correcting asymmetric signal 102 is to use extra signal currents. FIG. 2 depicts a conventional asymmetry correction circuit 200. Pbias transistors P1 and P2, cascode transistors C1 and C2, and Nbias transistors N1 and N2 are constantly biased. Transistors SWP are on when a signal INP is greater than a signal INM, and off otherwise. Also, transistors SWM are on when signal INP is less than signal INM, and off otherwise. Transistors CAS1p, CAS2p, CAS2m, and CAS1m control the polarity of the currents. When CAS1p and CAS1m are on, and CAS2p and CAS2m are off. If transistor SWP is on, the signal current flows from output OUTP to output OUTM, through transistors CAS1p, SWP, INP, resistor Rdeg, and transistors INM, SWP, and CAS1m. Or if transistor SWM is on, the signal current still flows from output OUTP to output OUTM, through transistors CAS1p, SWM, INM, resistor Rdeg, and transistors INP, SWM, and CAS1m. By adding this asymmetric correction signal current to the main signal current, the final output signal current asymmetry may be corrected, similar to the way shown in FIG. 1b. Similarly, when transistors CAS1p and CAS1m are off, and transistors CAS2p and CAS2m are on, the signal current flows from output OUTM to output OUTP for correcting the opposite asymmetry polarity.
Although using the extra signal currents may correct the asymmetry of asymmetric signal 102, the use of the extra signal currents needs a higher supply voltage due to stacking switches on top of the signal current path, and may cause higher power usage, higher current, and use more area on an integrated circuit (IC) chip.